Abstract
Nowadays, many battery-operated SoCs for loT and environmental monitoring applications are equipped with temperature sensors. In these miniaturized systems, power and area are two critical concerns. One challenge for temperature sensors is that they are sensitive to process corners and random mismatch. Generally, a 2-point trim and systematic non-linear error removal are required, especially for resistor-based sensing front-ends with two types of resistors, whose spread is partially uncorrelated [1], [2]. These corrections are done off-chip and digitally in most publications. In particular for low power sensors, they may consume more power and area than the sensor itself when integrated on-chip [3]. This work presents a resistive temperature sensor that integrates on-chip analog offset, gain and non-linearity correction techniques, while keeping state-of-the-art power and size performance. The prototype consumes 2.98pJ/conversion with an area of 0. 0023textmm 2 including all the correction techniques and achieves +0.7/-0.6 circC inaccuracy.
Original language | English |
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Title of host publication | 2023 IEEE International Solid-State Circuits Conference, ISSCC 2023 |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 356-358 |
Number of pages | 3 |
ISBN (Electronic) | 978-1-6654-9016-0 |
DOIs | |
Publication status | Published - 2023 |
Event | 70th IEEE International Solid-State Circuits Conference, ISSCC 2023 - Virtual, Online, United States Duration: 19 Feb 2023 → 23 Feb 2023 |
Conference
Conference | 70th IEEE International Solid-State Circuits Conference, ISSCC 2023 |
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Country/Territory | United States |
City | Virtual, Online |
Period | 19/02/23 → 23/02/23 |
Bibliographical note
Funding Information:This work is financed by the Dutch Research Council (NWO) with project number 16594. We kindly acknowledge EUROPRACTICE for its MPW and design tool support.