A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS

Ming Ding; Peng Zhang; Chuang Lu; Yan Zhang; Stefano Traferro; Gert Jan van Schaik; Yao Hong Liu; Jarkko Huijts; Christian Bachmann; Guido Dolmans; Kathleen Philips

doi:10.1109/RFIC.2017.7969044

A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS

Ming Ding, Peng Zhang, Chuang Lu, Yan Zhang, Stefano Traferro, Gert Jan van Schaik, Yao Hong Liu, Jarkko Huijts, Christian Bachmann, Guido Dolmans, Kathleen Philips

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

21 Citations (Scopus)

Abstract

This paper presents a wakeup receiver for latency-critical IoT applications in 90nm CMOS, which is fully compliant to many popular IoT wireless standards with constant envelope modulations, such as Bluetooth Low Energy and IEEE802.15.4. Paired with a standard-compliant transmitter, the proposed wakeup receiver method minimizes the overhead in system power, area and complexity. The proposed 2-dimensional wakeup pattern reduces the latency of a wakeup event to below 100μs. Supplied at a battery voltage of 2V, the chip fully integrates a power management unit, a wakeup receiver with offset and noise suppression, a low power digital baseband with automatic gain control and RSSI estimation, and a crystal oscillator. With a BLE compliant signal, the chip achieves -58dBm sensitivity, and a >600s mean time without false alarm, consuming 195μA.

Original language	English
Title of host publication	RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	168-171
Number of pages	4
ISBN (Electronic)	9781509046263
DOIs	https://doi.org/10.1109/RFIC.2017.7969044
Publication status	Published - 5 Jul 2017
Event	2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2017) - Honolulu, United States Duration: 4 Jun 2017 → 6 Jun 2017

Conference

Conference	2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2017)
Abbreviated title	RFIC 2017
Country/Territory	United States
City	Honolulu
Period	4/06/17 → 6/06/17

Keywords

CMOS
Low-power
Wakeup radio

Access to Document

10.1109/RFIC.2017.7969044

Cite this

Ding, M., Zhang, P., Lu, C., Zhang, Y., Traferro, S., van Schaik, G. J., Liu, Y. H., Huijts, J., Bachmann, C., Dolmans, G., & Philips, K. (2017). A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS. In RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium (pp. 168-171). Article 7969044 Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/RFIC.2017.7969044

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title = "A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS",

abstract = "This paper presents a wakeup receiver for latency-critical IoT applications in 90nm CMOS, which is fully compliant to many popular IoT wireless standards with constant envelope modulations, such as Bluetooth Low Energy and IEEE802.15.4. Paired with a standard-compliant transmitter, the proposed wakeup receiver method minimizes the overhead in system power, area and complexity. The proposed 2-dimensional wakeup pattern reduces the latency of a wakeup event to below 100μs. Supplied at a battery voltage of 2V, the chip fully integrates a power management unit, a wakeup receiver with offset and noise suppression, a low power digital baseband with automatic gain control and RSSI estimation, and a crystal oscillator. With a BLE compliant signal, the chip achieves -58dBm sensitivity, and a >600s mean time without false alarm, consuming 195μA.",

keywords = "CMOS, Low-power, Wakeup radio",

author = "Ming Ding and Peng Zhang and Chuang Lu and Yan Zhang and Stefano Traferro and {van Schaik}, {Gert Jan} and Liu, {Yao Hong} and Jarkko Huijts and Christian Bachmann and Guido Dolmans and Kathleen Philips",

year = "2017",

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doi = "10.1109/RFIC.2017.7969044",

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booktitle = "RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium",

publisher = "Institute of Electrical and Electronics Engineers",

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note = "2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2017), RFIC 2017 ; Conference date: 04-06-2017 Through 06-06-2017",

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Ding, M, Zhang, P, Lu, C, Zhang, Y, Traferro, S, van Schaik, GJ, Liu, YH, Huijts, J, Bachmann, C, Dolmans, G & Philips, K 2017, A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS. in RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium., 7969044, Institute of Electrical and Electronics Engineers, Piscataway, pp. 168-171, 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2017), Honolulu, Hawaii, United States, 4/06/17. https://doi.org/10.1109/RFIC.2017.7969044

A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS. / Ding, Ming; Zhang, Peng; Lu, Chuang et al.
RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium. Piscataway: Institute of Electrical and Electronics Engineers, 2017. p. 168-171 7969044.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Ding, Ming

AU - Zhang, Peng

AU - Lu, Chuang

AU - Zhang, Yan

AU - Traferro, Stefano

AU - van Schaik, Gert Jan

AU - Liu, Yao Hong

AU - Huijts, Jarkko

AU - Bachmann, Christian

AU - Dolmans, Guido

AU - Philips, Kathleen

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N2 - This paper presents a wakeup receiver for latency-critical IoT applications in 90nm CMOS, which is fully compliant to many popular IoT wireless standards with constant envelope modulations, such as Bluetooth Low Energy and IEEE802.15.4. Paired with a standard-compliant transmitter, the proposed wakeup receiver method minimizes the overhead in system power, area and complexity. The proposed 2-dimensional wakeup pattern reduces the latency of a wakeup event to below 100μs. Supplied at a battery voltage of 2V, the chip fully integrates a power management unit, a wakeup receiver with offset and noise suppression, a low power digital baseband with automatic gain control and RSSI estimation, and a crystal oscillator. With a BLE compliant signal, the chip achieves -58dBm sensitivity, and a >600s mean time without false alarm, consuming 195μA.

AB - This paper presents a wakeup receiver for latency-critical IoT applications in 90nm CMOS, which is fully compliant to many popular IoT wireless standards with constant envelope modulations, such as Bluetooth Low Energy and IEEE802.15.4. Paired with a standard-compliant transmitter, the proposed wakeup receiver method minimizes the overhead in system power, area and complexity. The proposed 2-dimensional wakeup pattern reduces the latency of a wakeup event to below 100μs. Supplied at a battery voltage of 2V, the chip fully integrates a power management unit, a wakeup receiver with offset and noise suppression, a low power digital baseband with automatic gain control and RSSI estimation, and a crystal oscillator. With a BLE compliant signal, the chip achieves -58dBm sensitivity, and a >600s mean time without false alarm, consuming 195μA.

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ER -

Ding M, Zhang P, Lu C, Zhang Y, Traferro S, van Schaik GJ et al. A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS. In RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium. Piscataway: Institute of Electrical and Electronics Engineers. 2017. p. 168-171. 7969044 doi: 10.1109/RFIC.2017.7969044

A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS

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