A 14b 200MS/s DAC with SFDR>78dBc, IM3

Yongjian Tang; J. Briaire; K. Doris; R.H.M. Veldhoven, van; P.C.W. Beek, van; J.A. Hegt; A.H.M. Roermund, van

doi:10.1109/VLSIC.2010.5560316

A 14b 200MS/s DAC with SFDR>78dBc, IM3

Yongjian Tang, J. Briaire, K. Doris, R.H.M. Veldhoven, van, P.C.W. Beek, van, J.A. Hegt, A.H.M. Roermund, van

Integrated Circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

12 Citations (Scopus)

232 Downloads (Pure)

Abstract

A 14-bit 200MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM) is presented. Compared to traditional static-mismatch mapping and dynamic element matching, DMM reduces the nonlinearities caused by both amplitude and timing errors, without noise penalty. This 0.14µm CMOS DAC achieves a state-of-the-art performance of SFDR>78dBc, IM3

Original language	Dutch
Title of host publication	Proceeding of 2010 IEEE Symposium on VLSI Circuits, 16-18 June 2010, Honolulu, USA
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
ISBN (Print)	978-1-4244-5454-9
DOIs	https://doi.org/10.1109/VLSIC.2010.5560316
Publication status	Published - 2010

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10.1109/VLSIC.2010.5560316

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Cite this

@inproceedings{9fc31f4a9c9c491b8a6dd4a3fbd2a023,

title = "A 14b 200MS/s DAC with SFDR>78dBc, IM3",

abstract = "A 14-bit 200MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM) is presented. Compared to traditional static-mismatch mapping and dynamic element matching, DMM reduces the nonlinearities caused by both amplitude and timing errors, without noise penalty. This 0.14µm CMOS DAC achieves a state-of-the-art performance of SFDR>78dBc, IM3",

author = "Yongjian Tang and J. Briaire and K. Doris and {Veldhoven, van}, R.H.M. and {Beek, van}, P.C.W. and J.A. Hegt and {Roermund, van}, A.H.M.",

year = "2010",

doi = "10.1109/VLSIC.2010.5560316",

language = "Nederlands",

isbn = "978-1-4244-5454-9",

booktitle = "Proceeding of 2010 IEEE Symposium on VLSI Circuits, 16-18 June 2010, Honolulu, USA",

publisher = "Institute of Electrical and Electronics Engineers",

address = "Verenigde Staten van Amerika",

}

A 14b 200MS/s DAC with SFDR>78dBc, IM3. / Tang, Yongjian; Briaire, J.; Doris, K.; Veldhoven, van, R.H.M.; Beek, van, P.C.W.; Hegt, J.A.; Roermund, van, A.H.M.

Proceeding of 2010 IEEE Symposium on VLSI Circuits, 16-18 June 2010, Honolulu, USA. Piscataway : Institute of Electrical and Electronics Engineers, 2010.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Veldhoven, van, R.H.M.

AU - Beek, van, P.C.W.

AU - Hegt, J.A.

AU - Roermund, van, A.H.M.

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AB - A 14-bit 200MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM) is presented. Compared to traditional static-mismatch mapping and dynamic element matching, DMM reduces the nonlinearities caused by both amplitude and timing errors, without noise penalty. This 0.14µm CMOS DAC achieves a state-of-the-art performance of SFDR>78dBc, IM3

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DO - 10.1109/VLSIC.2010.5560316

M3 - Conferentiebijdrage

SN - 978-1-4244-5454-9

BT - Proceeding of 2010 IEEE Symposium on VLSI Circuits, 16-18 June 2010, Honolulu, USA

PB - Institute of Electrical and Electronics Engineers

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