A 14-GHz 8-bit direct digital synthesizer in InP DHBT technology

Xiaopeng Li, Yi Zhang, Zhigong Wang, Youtao Zhang, Min Zhang, Wei Cheng, Hao Gao

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

This paper describes a 14-GHz 8-bit direct digital synthesizer(DDS)which is implemented using a 0.7-μm InP double hetero-junction bipolar transistor (DHBT) process. The DDS presented uses a sin-weighted nonlinear DAC to achieve a phase-to-amplitude ROM-less architecture which can make the best of speed advantage of the InP DHBT process for medium to large scale mixed signal integrated circuits. A simplified pipelined phase accumulator is used to reduce power consumption. The average value of SFDR of the output signal of the DDS in the Nyquist bandwidth is -24.8 dBc. The circuit integrates 2122 transistors, consumes a power of 2.4-W, and has a Figure of Merit (FOM) of 5.83GHz/W.
Original languageEnglish
Title of host publication 2019 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages3
ISBN (Electronic)978-1-7281-2496-4
DOIs
Publication statusPublished - Aug 2019
Event2019 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) - Nanjing, China
Duration: 28 Aug 201930 Aug 2019

Conference

Conference2019 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
CountryChina
CityNanjing
Period28/08/1930/08/19

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Cite this

Li, X., Zhang, Y., Wang, Z., Zhang, Y., Zhang, M., Cheng, W., & Gao, H. (2019). A 14-GHz 8-bit direct digital synthesizer in InP DHBT technology. In 2019 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) [8929198] Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/RFIT.2019.8929198