A novel, broadband, inductorless, multi- standard receiver front-end in a digital CMOS 90 nm low power (LP) process is described. The front-end operates in the frequency range from 0.8 GHz up to 1.7 GHz. It achieves a voltage gain of 24 dB and a noise figure of 5.5 dB. The measured IIP3 and IIP2 of the receiver are -13 dBm and +30 dBm, respectively. The input return loss is better than -10 dB in the frequency band from 0.8 GHz up to 1.7 GHz. The front-end consumes 26 mA from 1.2 V power supply and occupies a chip area of 1 mm2.
|Title of host publication||IEEE Radio and Wireless Symposium, 22-24 Jan. 2008|
|Publication status||Published - 2008|