A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios

P.J.A. Harpe; C. Zhou; Xiaoyan Wang; G. Dolmans; H.W.H. Groot, de

doi:10.1109/ESSCIRC.2010.5619891

A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios

P.J.A. Harpe, C. Zhou, Xiaoyan Wang, G. Dolmans, H.W.H. Groot, de

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

31 Citations (Scopus)

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Abstract

This paper presents an 8-bit asynchronous SAR ADC for flexible, low energy radios. The prototype in a 90nm CMOS technology achieves an ENOB of 7.7bit at a sampling frequency of 10.24MS/s while consuming 26.3µW from a 1V supply. Excellent power efficiency is achieved by using asynchronous dynamic logic, custom 0.5fF unit capacitors, a low-complexity design and an optimized layout. The measured prototype achieves a FoM of 12fJ/conversion-step, which is a 2.5x improvement over previous state-of-the-art 8-bit converters. Moreover, the fully dynamic design, which is optimized for low-leakage, leads to a standby power consumption of 6nW.

Original language	English
Title of host publication	Proceedings of the 36th European Solid-State Circuits Conference (ESSCIRC 2010), 14-16 September 2010, Seville, Spain
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	214-217
ISBN (Print)	978-1-4244-6662-7
DOIs	https://doi.org/10.1109/ESSCIRC.2010.5619891
Publication status	Published - 2010

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Harpe, P. J. A., Zhou, C., Wang, X., Dolmans, G., & Groot, de, H. W. H. (2010). A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios. In Proceedings of the 36th European Solid-State Circuits Conference (ESSCIRC 2010), 14-16 September 2010, Seville, Spain (pp. 214-217). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ESSCIRC.2010.5619891

@inproceedings{05447e598de14c4fba50947ed3fb4458,

title = "A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios",

abstract = "This paper presents an 8-bit asynchronous SAR ADC for flexible, low energy radios. The prototype in a 90nm CMOS technology achieves an ENOB of 7.7bit at a sampling frequency of 10.24MS/s while consuming 26.3µW from a 1V supply. Excellent power efficiency is achieved by using asynchronous dynamic logic, custom 0.5fF unit capacitors, a low-complexity design and an optimized layout. The measured prototype achieves a FoM of 12fJ/conversion-step, which is a 2.5x improvement over previous state-of-the-art 8-bit converters. Moreover, the fully dynamic design, which is optimized for low-leakage, leads to a standby power consumption of 6nW.",

author = "P.J.A. Harpe and C. Zhou and Xiaoyan Wang and G. Dolmans and {Groot, de}, H.W.H.",

year = "2010",

doi = "10.1109/ESSCIRC.2010.5619891",

language = "English",

isbn = "978-1-4244-6662-7",

pages = "214--217",

booktitle = "Proceedings of the 36th European Solid-State Circuits Conference (ESSCIRC 2010), 14-16 September 2010, Seville, Spain",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Harpe, PJA, Zhou, C, Wang, X, Dolmans, G & Groot, de, HWH 2010, A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios. in Proceedings of the 36th European Solid-State Circuits Conference (ESSCIRC 2010), 14-16 September 2010, Seville, Spain. Institute of Electrical and Electronics Engineers, Piscataway, pp. 214-217. https://doi.org/10.1109/ESSCIRC.2010.5619891

A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios. / Harpe, P.J.A.; Zhou, C.; Wang, Xiaoyan et al.
Proceedings of the 36th European Solid-State Circuits Conference (ESSCIRC 2010), 14-16 September 2010, Seville, Spain. Piscataway: Institute of Electrical and Electronics Engineers, 2010. p. 214-217.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios

AU - Harpe, P.J.A.

AU - Zhou, C.

AU - Wang, Xiaoyan

AU - Dolmans, G.

AU - Groot, de, H.W.H.

PY - 2010

Y1 - 2010

N2 - This paper presents an 8-bit asynchronous SAR ADC for flexible, low energy radios. The prototype in a 90nm CMOS technology achieves an ENOB of 7.7bit at a sampling frequency of 10.24MS/s while consuming 26.3µW from a 1V supply. Excellent power efficiency is achieved by using asynchronous dynamic logic, custom 0.5fF unit capacitors, a low-complexity design and an optimized layout. The measured prototype achieves a FoM of 12fJ/conversion-step, which is a 2.5x improvement over previous state-of-the-art 8-bit converters. Moreover, the fully dynamic design, which is optimized for low-leakage, leads to a standby power consumption of 6nW.

AB - This paper presents an 8-bit asynchronous SAR ADC for flexible, low energy radios. The prototype in a 90nm CMOS technology achieves an ENOB of 7.7bit at a sampling frequency of 10.24MS/s while consuming 26.3µW from a 1V supply. Excellent power efficiency is achieved by using asynchronous dynamic logic, custom 0.5fF unit capacitors, a low-complexity design and an optimized layout. The measured prototype achieves a FoM of 12fJ/conversion-step, which is a 2.5x improvement over previous state-of-the-art 8-bit converters. Moreover, the fully dynamic design, which is optimized for low-leakage, leads to a standby power consumption of 6nW.

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DO - 10.1109/ESSCIRC.2010.5619891

M3 - Conference contribution

SN - 978-1-4244-6662-7

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BT - Proceedings of the 36th European Solid-State Circuits Conference (ESSCIRC 2010), 14-16 September 2010, Seville, Spain

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

ER -

A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios

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