A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines

C. Lu, Reza Mahmoudi, A.H.M. Roermund, van, Paul van Zeijl

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

3 Citations (Scopus)
104 Downloads (Pure)

Abstract

This paper presents a 107GHz LNA prototype using TSMC 65nm CMOS technology. It explores the limit of the CMOS technology by effectively optimizing the active and passive devices. An improvement of 1.6dB higher maximum stable/available gain (MSG/MAG) on the transistor is achieved around 110GHz by layout optimization and inductor neutralization technique. A high quality factor co-planar waveguide (CPW) transmission line is designed utilizing the slow-wave effect. A quality factor of 23.6 is demonstrated by EM-simulations while taken the consideration of satisfying the stringent layout design rules. Based on the optimization on the active and passive devices, a dual-stage LNA is designed, with a simulated power gain of 10.2dB and noise figure of 8dB at 107GHz, verified by chip-level EM-simulations. The power consumption is 28.2mW.
Original languageEnglish
Title of host publicationProceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages1-4
ISBN (Print)978-1-4673-2113-6
DOIs
Publication statusPublished - 2012
Event19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012) - Eindhoven, Netherlands
Duration: 16 Nov 201216 Nov 2012
Conference number: 19

Conference

Conference19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012)
Abbreviated titleIEEE SCVT 2012
CountryNetherlands
CityEindhoven
Period16/11/1216/11/12

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Wave transmission
Electric lines
Wave effects
Coplanar waveguides
Noise figure
Transistors
Electric power utilization

Cite this

Lu, C., Mahmoudi, R., Roermund, van, A. H. M., & van Zeijl, P. (2012). A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines. In Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands (pp. 1-4). Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/SCVT.2012.6399397
Lu, C. ; Mahmoudi, Reza ; Roermund, van, A.H.M. ; van Zeijl, Paul. / A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines. Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands. Piscataway : Institute of Electrical and Electronics Engineers, 2012. pp. 1-4
@inproceedings{24893cc2d28047789b5182603d6fd7d6,
title = "A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines",
abstract = "This paper presents a 107GHz LNA prototype using TSMC 65nm CMOS technology. It explores the limit of the CMOS technology by effectively optimizing the active and passive devices. An improvement of 1.6dB higher maximum stable/available gain (MSG/MAG) on the transistor is achieved around 110GHz by layout optimization and inductor neutralization technique. A high quality factor co-planar waveguide (CPW) transmission line is designed utilizing the slow-wave effect. A quality factor of 23.6 is demonstrated by EM-simulations while taken the consideration of satisfying the stringent layout design rules. Based on the optimization on the active and passive devices, a dual-stage LNA is designed, with a simulated power gain of 10.2dB and noise figure of 8dB at 107GHz, verified by chip-level EM-simulations. The power consumption is 28.2mW.",
author = "C. Lu and Reza Mahmoudi and {Roermund, van}, A.H.M. and {van Zeijl}, Paul",
year = "2012",
doi = "10.1109/SCVT.2012.6399397",
language = "English",
isbn = "978-1-4673-2113-6",
pages = "1--4",
booktitle = "Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands",
publisher = "Institute of Electrical and Electronics Engineers",
address = "United States",

}

Lu, C, Mahmoudi, R, Roermund, van, AHM & van Zeijl, P 2012, A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines. in Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands. Institute of Electrical and Electronics Engineers, Piscataway, pp. 1-4, 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), Eindhoven, Netherlands, 16/11/12. https://doi.org/10.1109/SCVT.2012.6399397

A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines. / Lu, C.; Mahmoudi, Reza; Roermund, van, A.H.M.; van Zeijl, Paul.

Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands. Piscataway : Institute of Electrical and Electronics Engineers, 2012. p. 1-4.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

TY - GEN

T1 - A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines

AU - Lu, C.

AU - Mahmoudi, Reza

AU - Roermund, van, A.H.M.

AU - van Zeijl, Paul

PY - 2012

Y1 - 2012

N2 - This paper presents a 107GHz LNA prototype using TSMC 65nm CMOS technology. It explores the limit of the CMOS technology by effectively optimizing the active and passive devices. An improvement of 1.6dB higher maximum stable/available gain (MSG/MAG) on the transistor is achieved around 110GHz by layout optimization and inductor neutralization technique. A high quality factor co-planar waveguide (CPW) transmission line is designed utilizing the slow-wave effect. A quality factor of 23.6 is demonstrated by EM-simulations while taken the consideration of satisfying the stringent layout design rules. Based on the optimization on the active and passive devices, a dual-stage LNA is designed, with a simulated power gain of 10.2dB and noise figure of 8dB at 107GHz, verified by chip-level EM-simulations. The power consumption is 28.2mW.

AB - This paper presents a 107GHz LNA prototype using TSMC 65nm CMOS technology. It explores the limit of the CMOS technology by effectively optimizing the active and passive devices. An improvement of 1.6dB higher maximum stable/available gain (MSG/MAG) on the transistor is achieved around 110GHz by layout optimization and inductor neutralization technique. A high quality factor co-planar waveguide (CPW) transmission line is designed utilizing the slow-wave effect. A quality factor of 23.6 is demonstrated by EM-simulations while taken the consideration of satisfying the stringent layout design rules. Based on the optimization on the active and passive devices, a dual-stage LNA is designed, with a simulated power gain of 10.2dB and noise figure of 8dB at 107GHz, verified by chip-level EM-simulations. The power consumption is 28.2mW.

U2 - 10.1109/SCVT.2012.6399397

DO - 10.1109/SCVT.2012.6399397

M3 - Conference contribution

SN - 978-1-4673-2113-6

SP - 1

EP - 4

BT - Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

ER -

Lu C, Mahmoudi R, Roermund, van AHM, van Zeijl P. A 107GHz LNA in 65nm CMOS with inductive neutralization and slow-wave transmission lines. In Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux (IEEE SCVT 2012), 16 November 2012, Eindhoven, The Netherlands. Piscataway: Institute of Electrical and Electronics Engineers. 2012. p. 1-4 https://doi.org/10.1109/SCVT.2012.6399397