A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS

E. Lopelli; J.D. Tang, van der; K.J.P. Philips; A.H.M. Roermund, van; B. Gyselinckx

doi:10.1109/ISSCC.2009.4977391

A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS

E. Lopelli, J.D. Tang, van der, K.J.P. Philips, A.H.M. Roermund, van, B. Gyselinckx

Integrated Circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

4 Citations (Scopus)

58 Downloads (Pure)

Abstract

This paper presents a baseband Frequency-Hopping Synthesizer (FHS) architecture that achieves the above requirements, along with its circuit implementation. The system uses a combination of digital techniques, such as CMOS programmable dividers for scalability, low power and robustness, and analog techniques, such as harmonics suppression and filtering, for tight control of the harmonics throughout the frequency-generation chain. The hopping generator allows the generation of 56 accurate channels with a single frequency source, making FCC compliant FHSS possible in the ISM bands (915 and 2400 MHz) at a power dissipation of only 325 muW, which is more than an order of magnitude less than existing state-of-the-art fast-hopping synthesizers. The Single-Sideband (SSB) upconversion scheme allows doubling the number of channels that can be synthesized. The synthesizer uses a single reference signal, two programmable digital dividers, a double quadrature mixer with SSB selection capability, two Walsh shapers (WS) and a final filtering stage.

Original language	English
Title of host publication	Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	228-
ISBN (Print)	978-1-4244-3458-9
DOIs	https://doi.org/10.1109/ISSCC.2009.4977391
Publication status	Published - 2009

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Lopelli, E., Tang, van der, J. D., Philips, K. J. P., Roermund, van, A. H. M., & Gyselinckx, B. (2009). A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS. In Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California (pp. 228-). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISSCC.2009.4977391

Lopelli, E. ; Tang, van der, J.D. ; Philips, K.J.P. ; Roermund, van, A.H.M. ; Gyselinckx, B. / A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS. Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California. Piscataway : Institute of Electrical and Electronics Engineers, 2009. pp. 228-

@inproceedings{d5adc7c92d0946c5889e7326b2e6f8c6,

title = "A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS",

abstract = "This paper presents a baseband Frequency-Hopping Synthesizer (FHS) architecture that achieves the above requirements, along with its circuit implementation. The system uses a combination of digital techniques, such as CMOS programmable dividers for scalability, low power and robustness, and analog techniques, such as harmonics suppression and filtering, for tight control of the harmonics throughout the frequency-generation chain. The hopping generator allows the generation of 56 accurate channels with a single frequency source, making FCC compliant FHSS possible in the ISM bands (915 and 2400 MHz) at a power dissipation of only 325 muW, which is more than an order of magnitude less than existing state-of-the-art fast-hopping synthesizers. The Single-Sideband (SSB) upconversion scheme allows doubling the number of channels that can be synthesized. The synthesizer uses a single reference signal, two programmable digital dividers, a double quadrature mixer with SSB selection capability, two Walsh shapers (WS) and a final filtering stage.",

author = "E. Lopelli and {Tang, van der}, J.D. and K.J.P. Philips and {Roermund, van}, A.H.M. and B. Gyselinckx",

year = "2009",

doi = "10.1109/ISSCC.2009.4977391",

language = "English",

isbn = "978-1-4244-3458-9",

pages = "228--",

booktitle = "Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Lopelli, E, Tang, van der, JD, Philips, KJP, Roermund, van, AHM & Gyselinckx, B 2009, A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS. in Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California. Institute of Electrical and Electronics Engineers, Piscataway, pp. 228-. https://doi.org/10.1109/ISSCC.2009.4977391

A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS. / Lopelli, E.; Tang, van der, J.D.; Philips, K.J.P.; Roermund, van, A.H.M.; Gyselinckx, B.

Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California. Piscataway : Institute of Electrical and Electronics Engineers, 2009. p. 228-.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS

AU - Lopelli, E.

AU - Tang, van der, J.D.

AU - Philips, K.J.P.

AU - Roermund, van, A.H.M.

AU - Gyselinckx, B.

PY - 2009

Y1 - 2009

N2 - This paper presents a baseband Frequency-Hopping Synthesizer (FHS) architecture that achieves the above requirements, along with its circuit implementation. The system uses a combination of digital techniques, such as CMOS programmable dividers for scalability, low power and robustness, and analog techniques, such as harmonics suppression and filtering, for tight control of the harmonics throughout the frequency-generation chain. The hopping generator allows the generation of 56 accurate channels with a single frequency source, making FCC compliant FHSS possible in the ISM bands (915 and 2400 MHz) at a power dissipation of only 325 muW, which is more than an order of magnitude less than existing state-of-the-art fast-hopping synthesizers. The Single-Sideband (SSB) upconversion scheme allows doubling the number of channels that can be synthesized. The synthesizer uses a single reference signal, two programmable digital dividers, a double quadrature mixer with SSB selection capability, two Walsh shapers (WS) and a final filtering stage.

AB - This paper presents a baseband Frequency-Hopping Synthesizer (FHS) architecture that achieves the above requirements, along with its circuit implementation. The system uses a combination of digital techniques, such as CMOS programmable dividers for scalability, low power and robustness, and analog techniques, such as harmonics suppression and filtering, for tight control of the harmonics throughout the frequency-generation chain. The hopping generator allows the generation of 56 accurate channels with a single frequency source, making FCC compliant FHSS possible in the ISM bands (915 and 2400 MHz) at a power dissipation of only 325 muW, which is more than an order of magnitude less than existing state-of-the-art fast-hopping synthesizers. The Single-Sideband (SSB) upconversion scheme allows doubling the number of channels that can be synthesized. The synthesizer uses a single reference signal, two programmable digital dividers, a double quadrature mixer with SSB selection capability, two Walsh shapers (WS) and a final filtering stage.

U2 - 10.1109/ISSCC.2009.4977391

DO - 10.1109/ISSCC.2009.4977391

M3 - Conference contribution

SN - 978-1-4244-3458-9

SP - 228-

BT - Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

ER -

Lopelli E, Tang, van der JD, Philips KJP, Roermund, van AHM, Gyselinckx B. A 0.75V 523W 40dB-SFDR frequency-hopping synthesizer for wireless sensor networks in 90nm CMOS. In Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, California. Piscataway: Institute of Electrical and Electronics Engineers. 2009. p. 228- https://doi.org/10.1109/ISSCC.2009.4977391