32.6 A 76-to-81GHz Direct-Digital 7b 14GS/s Double-Balanced I/Q Mixing-DAC Radar-Waveform Synthesizer

Marios Neofytou, Kostas Doris, Marcello Ganzerli, Maarten Lont, Georgi I. Radulov

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

6 Citations (Scopus)
69 Downloads (Pure)

Abstract

Automotive radars that can achieve angular resolution below 1 degree require virtual MIMO antenna arrays with hundreds of elements. To operate such arrays without compromising range and velocity resolution and to have a sufficient SNR for a long-range operation, FMCW MIMO radars require fast chirps of hundreds of MHz within a few microseconds in combination with slow-time code-division multiple-access (CDMA) and doppler-division multiple-access (DDMA) MIMO implemented with phase rotators. Scaling radar performance with FMCW waveforms [1] becomes limited by microsecond chirp settling time of conventional fractional-N synthesizers [2, 3], wasting a substantial fraction of the available radar frame and limiting implementation efficiency.

Original languageEnglish
Title of host publication2024 IEEE International Solid-State Circuits Conference, ISSCC 2024
PublisherInstitute of Electrical and Electronics Engineers
Pages530-532
Number of pages3
ISBN (Electronic)979-8-3503-0620-0
DOIs
Publication statusPublished - 13 Mar 2024
Event2024 IEEE International Solid-State Circuits Conference, ISSCC 2024 - San Francisco, United States
Duration: 18 Feb 202422 Feb 2024

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume67
ISSN (Print)0193-6530

Conference

Conference2024 IEEE International Solid-State Circuits Conference, ISSCC 2024
Country/TerritoryUnited States
CitySan Francisco
Period18/02/2422/02/24

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