Abstract
This paper presents a 30-GHz co-design of a 28-dB high-gain low-noise amplifier (LNA) and a 54% high-efficiency monopole antenna-on-chip for 5G wireless applications. The LNA design is based on a two-stage differential cascode structure with inductive degeneration. The antenna design is a modified monopole structure to maximize the radiation efficiency. Both parts are integrated directly on the same silicon chip in a 0.25 µm SiGe BiCMOS technology. A co-design method is proposed according to various considerations and a compact matching network is implemented to achieve the optimal power and noise matching. The measurement results show a total gain of 27 dB of the complete system.
| Original language | English |
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| Title of host publication | 2019 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Number of pages | 3 |
| ISBN (Electronic) | 978-1-7281-2496-4 |
| DOIs | |
| Publication status | Published - Aug 2019 |
| Event | 2019 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) - Nanjing, China Duration: 28 Aug 2019 → 30 Aug 2019 |
Conference
| Conference | 2019 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) |
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| Country/Territory | China |
| City | Nanjing |
| Period | 28/08/19 → 30/08/19 |
Keywords
- antenna-on-chip (AoC)
- co-design
- low-noise amplifier (LNA)
- millimeter wave (mm-wave)