This paper presents the analysis of the performance of charge pump, and the design strategy and efficiency optimization of 2.4GHz micro-power charge pump using 65nm CMOS technology. The model of the charge pump takes account of the threshold voltage variation, bulk modulation, and the major parasitic capacitor. Charge pump is sensitive to the input voltage swing and the actual input voltage swing is less after the capacitor divider, which generates the optimized size transistor. From the mathematic model of the charge pump, the relationship between the charge pump performance and design parameter is presented. After parameter analysis and performance discussion, a design procedure to maximize performance is presented. Corresponding to the design procedure presented in this paper, a high efficiency charge pump at 2.4GHz is presented.
|Title of host publication||Proceedings of IEEE Radio and Wireless Symposium (RWS), 16-19 January 2011, Phoenix, AZ, USA|
|Publication status||Published - 2011|