160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter

F. Gomez-Agis; N. Calabretta; A. Albores Mejia; O. Raz; H.J.S. Dorren

160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Abstract

A novel packet clock distribution concept based on insertion of in-band clock pilot is presented. Experimental results for 160 Gbit/s OTDM packet data indicate a low timing jitter of 250 fs for the bursty clock enabling error-free operation with 1 dB penalty.

Original language	English
Title of host publication	Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	P3.22-1/3
ISBN (Print)	978-1-4244-8535-2
Publication status	Published - 2010

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Gomez-Agis, F., Calabretta, N., Albores Mejia, A., Raz, O., & Dorren, H. J. S. (2010). 160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter. In Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy (pp. P3.22-1/3). Institute of Electrical and Electronics Engineers.

Gomez-Agis, F. ; Calabretta, N. ; Albores Mejia, A. et al. / 160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter. Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy. Piscataway : Institute of Electrical and Electronics Engineers, 2010. pp. P3.22-1/3

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title = "160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter",

abstract = "A novel packet clock distribution concept based on insertion of in-band clock pilot is presented. Experimental results for 160 Gbit/s OTDM packet data indicate a low timing jitter of 250 fs for the bursty clock enabling error-free operation with 1 dB penalty.",

author = "F. Gomez-Agis and N. Calabretta and \{Albores Mejia\}, A. and O. Raz and H.J.S. Dorren",

year = "2010",

language = "English",

isbn = "978-1-4244-8535-2",

pages = "P3.22--1/3",

booktitle = "Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Gomez-Agis, F , Calabretta, N , Albores Mejia, A , Raz, O & Dorren, HJS 2010, 160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter. in Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy. Institute of Electrical and Electronics Engineers, Piscataway, pp. P3.22-1/3.

160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter. / Gomez-Agis, F.; Calabretta, N.; Albores Mejia, A. et al.
Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy. Piscataway: Institute of Electrical and Electronics Engineers, 2010. p. P3.22-1/3.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - 160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter

AU - Gomez-Agis, F.

AU - Calabretta, N.

AU - Albores Mejia, A.

AU - Raz, O.

AU - Dorren, H.J.S.

PY - 2010

Y1 - 2010

N2 - A novel packet clock distribution concept based on insertion of in-band clock pilot is presented. Experimental results for 160 Gbit/s OTDM packet data indicate a low timing jitter of 250 fs for the bursty clock enabling error-free operation with 1 dB penalty.

AB - A novel packet clock distribution concept based on insertion of in-band clock pilot is presented. Experimental results for 160 Gbit/s OTDM packet data indicate a low timing jitter of 250 fs for the bursty clock enabling error-free operation with 1 dB penalty.

M3 - Conference contribution

SN - 978-1-4244-8535-2

SP - P3.22-1/3

BT - Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

ER -

Gomez-Agis F , Calabretta N , Albores Mejia A , Raz O, Dorren HJS. 160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter. In Proceedings of the 36th European Conference and Exhibition on Optical Communication, ECOC 2010, September 19-23, 2010, Torino, Italy. Piscataway: Institute of Electrical and Electronics Engineers. 2010. p. P3.22-1/3

160-Gbit/s packet clock distribution with instantaneous synchronization and low timing jitter

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