Abstract
Chapter 9 shows that the digitization of a ΣΔ modulator can be done at different abstraction levels, which are system/application level, analog IP architecture level and circuit/layout level. In this section ΣΔ modulator implementations suited for highly digitized receiver systems, an implementation that is digitized at modulator architecture level, and a modulator that is designed using the digital design methodology will be shown. At the end of Chap. 9 the implemented ΣΔ modulators will be judged on the quality indicators of Chap. 2 and the FOMs of Chap. 8.
| Original language | English |
|---|---|
| Title of host publication | Robust Sigma Delta Converters |
| Subtitle of host publication | And Their Application in Low-Power Highly-Digitized Flexible Receivers |
| Publisher | Springer |
| Chapter | 9 |
| Pages | 213-261 |
| Number of pages | 49 |
| ISBN (Electronic) | 978-94-007-0644-6 |
| ISBN (Print) | 978-94-007-0643-9 |
| DOIs | |
| Publication status | Published - 2011 |
Publication series
| Name | Analog Circuits and Signal Processing |
|---|---|
| ISSN (Print) | 1872-082X |
| ISSN (Electronic) | 2197-1854 |
Bibliographical note
Publisher Copyright:© 2011, Springer Science+Business Media B.V.
Keywords
- Clock Frequency
- Image Rejection
- Phase Lock Loop
- Quantization Noise
- Unity Gain Frequency