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MNEMOSENE - Computation-in-memory architecture based on resistive devices
Corporaal, Henk
(Project Manager)
Jordans, Roel
(Project member)
Sánchez Martín, Víctor
(Project Manager)
Stuijk, Sander
(Project member)
Banagozar, Ali
(Project member)
Vadivel, Kanishkan
(Project member)
Singh, Gagandeep
(Project member)
van der Hagen, Daniëlle
(Project communication officer)
de Mol-Regels, Marja
(Project communication officer)
Efficient Stream Processing Lab
High Tech Systems Center
Project
:
Research direct
Overview
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Research output
(6)
Fingerprint
Explore the research topics touched on by this project. These labels are generated based on the underlying awards/grants. Together they form a unique fingerprint.
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Weight
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Computer Science
Memristor
100%
Von Neumann Architecture
50%
Memory Architecture
44%
Code Generation
33%
Datapath
33%
Systems Simulation
33%
Machine Learning
33%
Sequential Code
33%
Memory Subsystem
33%
Central Processing Unit
33%
Boolean Logic
33%
Matrix Multiply
33%
Memory Technology
33%
Memory Hierarchy
33%
Memory Array
33%
Non-Volatile Memory
33%
SystemC
33%
Open Source
33%
Programmability
22%
High-Level Programming Language
16%
Processor Architectures
16%
Energy Efficiency
16%
reconfigurable architecture
16%
Open Research
16%
Learning Framework
11%