Project Details
Description
There is still an enormous difference in energy-efficiency between modern deep learning (DL) ASICs and the human brain. Within the efficient Deep Learning Platforms (eDLP) project we aim to adopt principles that make the human brain so energy-efficient (i.e., low frequency, massively parallel, analog, asynchronous, approximate/low precision computing, redundancy/fault tolerance) in the design of HW/SW platforms for DL applications.
The project addresses three main energy-efficient related data efficient DL challenges:
•definition of novel energy-efficient hardware platforms for state-of-the-art DL interference algorithms.
•development of techniques for mapping of state-of-the-art DL algorithms to these hardware platforms.
•definition of hardware/software provisions for in-field learning and model updates.
The project addresses three main energy-efficient related data efficient DL challenges:
•definition of novel energy-efficient hardware platforms for state-of-the-art DL interference algorithms.
•development of techniques for mapping of state-of-the-art DL algorithms to these hardware platforms.
•definition of hardware/software provisions for in-field learning and model updates.
Layman's description
HW-SW design for efficient processing of DNNs on low energy embedded systems
Acronym | TTW P16-25 (project 7) |
---|---|
Status | Finished |
Effective start/end date | 1/09/18 → 31/12/23 |
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