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Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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Analog circuits to the limit: minimum resources with maximum performance
Harpe, P. J. A., Harpe, P. J. A., Shen, Y., Li, H. & van der Hagen, D.
1/08/18 → 31/07/23
Project: Research direct
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A 103-dB SFDR Calibration-Free Oversampled SAR ADC with Mismatch Error Shaping and Pre-Comparison Techniques
Shen, Y., Li, H., Xin, H., Cantatore, E. & Harpe, P., 1 Mar 2022, In: IEEE Journal of Solid-State Circuits. 57, 3, p. 734-744 11 p., 9663409.Research output: Contribution to journal › Article › Academic › peer-review
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Analysis of the Sampling Noise Cancellation Technique in a Track-and-Hold Amplifier
Li, H., Youssef, M., Shen, Y., Cantatore, E. & Harpe, P., 10 Jan 2022, 2021 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021 - Proceedings. Institute of Electrical and Electronics Engineers, 5 p. 9665546Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
Open AccessFile71 Downloads (Pure) -
A low-cost 0.98μW0.8V oversampled SAR ADC with pre-comparison and mismatch error shaping achieving 84.5dB SNDR and 103dB SFDR
Shen, Y., Li, H., Xin, H., Cantatore, E. & Harpe, P., 17 May 2021, 2021 IEEE Custom Integrated Circuits Conference (CICC). Institute of Electrical and Electronics Engineers, 2 p. 9431475Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
2 Citations (Scopus)1 Downloads (Pure) -
An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error Shaping
Li, H., Shen, Y., Xin, H., Cantatore, E. & Harpe, P., 26 Oct 2021, ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC). Institute of Electrical and Electronics Engineers, p. 387-390 4 p. 9567748Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
1 Downloads (Pure) -
A 0.38-pJ/b Simplex and a 1.2-pJ/b Full-Duplex Chip-to-Chip Digital Communication Interface with Data Rate and Load Capacitance Adaptability
Shen, Y., Li, H., Cantatore, E. & Harpe, P., 2020, In: IEEE Solid-State Circuits Letters. 3, p. 322-325 4 p., 9171283.Research output: Contribution to journal › Article › Academic › peer-review
Open AccessFile16 Downloads (Pure)
Thesis
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Circuit implementation of a novel rotating resistor ladder DAC
Author: Shen, Y., 28 Jun 2018Supervisor: Harpe, P. J. A. (Supervisor 1) & van Veldhoven, R. H. M. (External coach)
Student thesis: Master