Projects per year
Personal profile
Academic background
Stijn received his Bachelor and Master degrees from the Eindhoven University of Technology in the Netherlands, in 2019 and 2021, respectively. He started as a PhD candidate at Eindhoven University of Technology in September 2021. His main interests are in the field of Machine Learning applied to the simulations performed on integrated circuits.
Research profile
Stijn Ringeling is a PhD candidate in the Emerging technologies Lab, which is part of the Integrated Circuits group. He is working on the RAISE project, where his main aim is to develop faster evaluation techniques for circuit performance simulations using Machine Learning. Besides his research, Stijn is also involved as a TA for the 5CCA0 course and is supporting various Bachelor students for their thesis projects.
Fingerprint
Dive into the research topics where Stijn H.W. Ringeling is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 1 Similar Profiles
Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
Projects
- 1 Active
-
TKI-HTSM/21.0218/TKI2112P10 RAISE IC: Robust AI for SafE (radar) signal processing [RAISE]
Cantatore, E. (Project Manager), Ringeling, S. H. W. (Project member), Sanders, N. (Project member), Papale, L. (Project member), Fattori, M. (Project member) & de Mulder, W. (Project member)
1/06/21 → 31/05/28
Project: Third tier
-
Hardware implementation of backpropagation using progressive gradient descent for in situ training of multilayer neural networks
van Doremaele, E. R. W., Stevens, T., Ringeling, S., Spolaor, S., Fattori, M. (Corresponding author) & van de Burgt, Y. (Corresponding author), Jul 2024, In: Science Advances. 10, 28, 7 p., eado8999.Research output: Contribution to journal › Article › Academic › peer-review
Open AccessFile5 Citations (Scopus)70 Downloads (Pure) -
Novel Baseband Analog Beamforming through Resistive DACs and Sigma Delta Modulators
Ringeling, S., Steinebach, L., Liu, Q., Zhang, C., Bajoria, S., Bolatkale, M., Breems, L. & Radulov, G., Sept 2020, ECCTD 2020 - 24th IEEE European Conference on Circuit Theory and Design. Institute of Electrical and Electronics Engineers, 4 p. 9218408Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
1 Citation (Scopus)