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Kanishkan Vadivel, MSc

  • 0 Citations
20172019
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Personal profile

Research profile

Kanishkan Vadivel is Researcher in the Electronic Systems group of the Department of Electrical Engineering at Eindhoven University of Technology (TU/e). His early research interest includes developing hardware architecture for energy efficient and high-performance computing, and compiler based code-generation techniques.

Kanishkan's current research includes optimal code-generation for explicit datapath architecture(CGRA) and part of MNEMOSENE project aimed to demonstrate a new computation-in-memory architecture based on resistive devices.

Quote

Designing smart and hasty machine is hard.! I take up a challenge of designing such machines with necessary tool support for usability and optimize them for energy efficiency

Academic background

Kanishkan Vadivel obtained his Master’s degree in Embedded Sytems from Eindhoven University of Technology (TU/e) in 2017 and started as a researcher in Feb 2019. Kanishkan received a bachelor degree from Coimbatore Institute of Technology(India) and has 3.5years of industrial experience in Embedded systems from Tata Engineering(India) and in Arm Ltd(Cambridge, UK).

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Reconfigurable architectures Engineering & Materials Science
Energy efficiency Engineering & Materials Science
Computer programming languages Engineering & Materials Science
Data storage equipment Engineering & Materials Science
Computer hardware Engineering & Materials Science
Memristors Engineering & Materials Science

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Research Output 2017 2019

  • 3 Conference contribution

Towards efficient code generation for exposed datapath architectures

Vadivel, K., Jordans, R., Stuijk, S., Corporaal, H., Jääskeläinen, P. & Kultala, H., 27 May 2019, Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019. Stuijk, S. (ed.). New York: Association for Computing Machinery, Inc, p. 86-89 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Open Access
File
Reconfigurable architectures
Computer programming languages
Energy efficiency
Code generation

CIM-SIM: computation in Memory SIMuIator

Banagozar, A., Wong, S., Abu Lebdeh, M., Vadivel, K., Yu, J., Hamdioui, S., Stuijk, S. & Corporaal, H., 27 May 2019, Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019. Stuijk, S. (ed.). New York: Association for Computing Machinery, Inc, p. 1-4 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Open Access
File
Data storage equipment
Memristors
Pulse code modulation
Program processors
Simulators

Loop overhead reduction techniques for coarse grained reconfigurable architectures

Vadivel, K., Wijtvliet, M., Jordans, R. & Corporaal, H., 28 Sep 2017, DSD 2017 - 20th Euromicro Conference on Digital System Design, 30 August - 1 September 2017, Vienna, Austriavadivel wijtvliet jordfans. Piscataway: Institute of Electrical and Electronics Engineers, p. 14-21 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Reconfigurable architectures
Computer hardware
Energy efficiency
Computer vision
Particle accelerators

Prizes

HiPEAC collaboration grant

Kanishkan Vadivel (Recipient), 2019

Recognition: OtherFellowships & membershipsScientific

Student theses

Energy efficient loop mapping techniques for coarse-grained reconfigurable architecture

Author: Vadivel, K., 31 Aug 2017

Supervisor: Corporaal, H. (Supervisor 1), Jordans, R. (Supervisor 2) & van Barkel, K. (External person) (External coach)

Student thesis: Master

File