• 1798 Citations
1983 …2019
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Personal profile

Quote

“In my role as professor I bridge the gap between academia and industry by bringing industrial experience to classrooms and by bringing innovation technologies to industry.”

Research profile

José Pineda de Gyvez is Full Professor of Resilient Nanoelectronics in the Electronic Systems groups within the Department of Electrical Engineering at Eindhoven University of Technology (TU/e), where he researches ultra-low power designs, variability tolerance and context-aware computing. Pineda focuses on semiconductor technology and market intelligence, advanced systems power management and low-power techniques for integrated circuits.
 
He is known for his deployment of systems power management techniques in application domains like microcontrollers, personal health, and the Internet of Things. He is an expert in low-power digital designs, where he has worked on techniques like (near) subthreshold design, DVFS, systems power management, and technology-aware physical design. Pineda became an IEEE Fellow in 2009.

Pineda has been Associate Editor in IEEE Transactions on Circuits and Systems Part I and Part II, and also Associate Editor for Technology in IEEE Transactions on Semiconductor Manufacturing. He is also a member of the editorial boards of the Journal of Low Power Electronics and of the Journal of Low Power Electronics and Applications. Pineda has co-authored more than 100 publications in the fields of testing, nonlinear circuits, and low power design. He is (co)-author of four books, and has more than 30 granted US patents. His work has been acknowledged in academic environments as well as in patent portfolios of many companies. Pineda’s research has been funded by the Dutch Ministry of Science, US Office of Naval Research, US National Science Foundation, among others. 

Academic background

José Pineda de Gyvez received his PhD from the Eindhoven University of Technology (TU/e) in 1991. Previously, Pineda attended the Instituto Nacional de Astrofísica, Óptica y Electrónica (Mexico) and University of Toronto (Canada), receiving his MSc in 1984. From 1991 to 1999, he was a faculty member in the Department of Electrical Engineering at Texas A&M University, USA. After this, Pineda was Principal Scientist at Philips Research (1999 to 2006).  

Pineda has worked since 2006 with NXP Semiconductors as a Principal Scientist, as Program Manager of Variability Tolerant Design and as a Fellow in Low Power Innovation; he has been Professor at Eindhoven University of Technology (TU/e) since 2006.

Fingerprint Dive into the research topics where Jose Pineda de Gyvez is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

Networks (circuits) Engineering & Materials Science
Electric potential Engineering & Materials Science
Flip flop circuits Engineering & Materials Science
Microcontrollers Engineering & Materials Science
Digital circuits Engineering & Materials Science
Integrated circuits Engineering & Materials Science
Tuning Engineering & Materials Science
Electric power utilization Engineering & Materials Science

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Research Output 1983 2019

112 Citations (Scopus)
219 Downloads (Pure)

Resistance characterization for weak open defects

Montanes, R. R., Pineda de Gyvez, J. & Volf, P. A. J., 2002, In : IEEE Design and Test of Computers. 19, 5, p. 18-26 9 p.

Research output: Contribution to journalArticleAcademicpeer-review

Open Access
File
Defects
Networks (circuits)
70 Citations (Scopus)
87 Downloads (Pure)

An ultra-low-energy multi-standard JPEG co-processor in 65 nm CMOS with sub/near threshold supply voltage

Pu, Y., Pineda de Gyvez, J., Corporaal, H. & Ha, Y., 2010, In : IEEE Journal of Solid-State Circuits. 45, 3, p. 668-680

Research output: Contribution to journalArticleAcademicpeer-review

Open Access
File
Energy dissipation
Throughput
Electric potential
Transistors
Acoustic streaming
60 Citations (Scopus)
295 Downloads (Pure)

Threshold voltage mismatch and intra-die leakage current in digital CMOS circuits

Pineda de Gyvez, J. & Tuinhout, H. P., 2004, In : IEEE Journal of Solid-State Circuits. 39, 1, p. 157-168 12 p.

Research output: Contribution to journalArticleAcademicpeer-review

Open Access
File
Threshold voltage
Leakage currents
Transistors
Networks (circuits)
Digital circuits

Chip health tracking using dynamic in-situ delay monitoring

Balef, H. A., Goossens, K. & de Gyvez, J. P., 14 May 2019, Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019. Institute of Electrical and Electronics Engineers, p. 304-307 4 p. 8715014

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Health
Chip
Monitoring
Monitor
Excitation
1 Downloads (Pure)

Enhancing sensitivity-based power reduction for an industry IC design context

Fatemi, H., Kahng, A. B., Lee, H., Li, J. & Pineda de Gyvez, J., 1 May 2019, In : Integration : the VLSI Journal. 66, p. 96-111 16 p.

Research output: Contribution to journalArticleAcademicpeer-review

Product design
Industry
Foundries
Integrated circuit design

Prizes

Fellow IEEE

Jose Pineda de Gyvez (Recipient), 2009

Prize: OtherFellowships & membershipsScientific

IEEE Fellow

Jose Pineda de Gyvez (Recipient), 2009

Prize: OtherFellowships & membershipsScientific

Integrated circuits
Defects
Testing

Activities 2006 2018

Journal of Low Power Electronics and Applications (Journal)

J. Pineda de Gyvez (Guest editor)
2018 → …

Activity: Publication peer-review and editorial work typesEditorial activityScientific

IEEE Transactions on Circuits and Systems. Part II: Express Briefs (Journal)

Jose Pineda de Gyvez (Editorial board member)
20142015

Activity: Publication peer-review and editorial work typesEditorial activityScientific

38th European Solid-State Circuits Conference (ESSCIRC 2012)

Jose Pineda de Gyvez (Member of programme committee)
2012

Activity: Participating in or organising an event typesConferenceScientific

11th IEEE Latin American Test Workshop

Jose Pineda de Gyvez (Member of programme committee)
2010

Activity: Participating in or organising an event typesConferenceScientific

2010 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2010)

Jose Pineda de Gyvez (Member of programme committee)
2010

Activity: Participating in or organising an event typesConferenceScientific

Courses

Student theses

A method of analysing defect sensitivity in integrated circuits

Author: Dierikx, M., 30 Oct 1987

Supervisor: Pineda de Gyvez, J. (Supervisor 1) & Jess, J. (Supervisor 2)

Student thesis: Master

File

An energy efficient vector processor for independent component analysis

Author: Lin, X., 31 Aug 2012

Supervisor: Pineda de Gyvez, J. (Supervisor 1), Huisken, J. (External coach), Young, A. (External person) (External coach) & Berset, T. (External person) (External coach)

Student thesis: Master

Audio codec built-in self-test for SoC

Author: Li, K., 30 Apr 2016

Supervisor: Pineda de Gyvez, J. (Supervisor 1) & Heiden, van der, H. (External person) (External coach)

Student thesis: Master

Deployment of low-power techniques in an FPGA platform used for interferometer applications

Author: Sun, C., 31 Aug 2010

Supervisor: Pineda de Gyvez, J. (Supervisor 1)

Student thesis: Master

Design and implementation of a low energy low EDP 90nm AES-128 cipher/decipher

Author: Echeverri, J., 31 Oct 2014

Supervisor: Pineda de Gyvez, J. (Supervisor 1)

Student thesis: Master

File