Jeroen Bolk

dr., ing.

  • Source: Scopus

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Personal profile

Academic background

Jeroen Bolk obtained an Engineers degree at higher vocational education level in chemical laboratory techniques with Fontys Hogescholen Eindhoven, in 1999. He then started his technical career with Philips Research at the "NatLab" in Eindhoven, followed by Philips Semiconductors that later became NXP semiconductors in Nijmegen. During this period, he gathered almost a decade of semiconductor processing experience on various wafer diameters, in a research, development, and production environment, eventually reaching a level of senior process engineer.

In 2009, he joined the faculty of electrical engineering at the Eindhoven University of Technology, as a technical staff member of the optoelectronic devices (OED) research group headed by prof. M. Smit. In this role, Jeroen focused on the process technology development for InP based photonic integrated circuits, contributing to many research projects. As a member of both PhI and NanoLab@TU/e departments, he facilitated the installation and adaptation of the world’s first ArF scanner to expose 3-inch InP substrates in 2011.

In the following years, Jeroen contributed significantly to the development of ArF related processing as a technical staff member. He was offered a Ph.D. position in an NWO project by prof. K. Williams of the PhI group in 2017. The work that was performed in both these roles is for a large part described in this thesis: ArF Scanner Lithography for InP Photonic Integrated Circuit Fabrication. This work was successfully defended on May 12th 2020 to obtain his Ph.D. degree.

Research profile

Jeroen Bolk is a process engineer for NanoLab@TU/e headed by Frank Dirne, as well as a Ph.D. researcher and technical staff member for the Photonic Integration (PhI) research group headed by Prof. Kevin Williams. His key field of expertise is in the technology development for photonic integrated circuit (PIC) manufacturing. He has experience with most wafer-scale processing techniques with extensive experience in dry-etching, resist ashing, lithography, and the integration implications of such steps. Most recently he has worked on the implementation of ArF scanner lithography, to exploit its advantages for the development of novel InP PIC building blocks and enable a route to foundry scale manufacturing volumes. This technology was adopted by an affiliated semiconductor foundry and will be used for future PIC applications in sensing, communication and automotive.


Manufacturing technology forms the foundation for the photonic integrated circuits of tomorrow. I want to contribute to exploit this capability to enable unprecedented advances in the field of photonics.


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