Projects per year
Personal profile
Research profile
Felipe Villenas was born in Viña del Mar, Chile. He is a PhD candidate in the Information and Communication Theory Lab (ICT Lab) within the Signal Processing Systems (SPS) group. His research focuses on using tools from communication theory and digital signal processing for the design of light-coherent solutions for short-reach and high datarate fiber-optic communications.
Academic background
Felipe Villenas received an Electronics Engineer degree (Ingeniero Civil Electrónico) and a M.Sc. degree from Universidad Técnica Federico Santa María, Chile in 2023. Since April of 2024, he is a PhD student at Eindhoven University of Technology, Netherlands.
Education and Teaching
5ETB0: Communication Theory
Education/Academic qualification
Master, Electronics Engineering, Universidad Tecnica Federico Santa Maria
Mar 2021 → Apr 2023
Bachelor, Electronics Engineering, Universidad Tecnica Federico Santa Maria
Mar 2016 → Dec 2021
Projects
- 1 Active
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COCOLI: COmplexity-COnstrained LIght-coherent optical links
Alvarado, A. (Project Manager), Villenas Cortez, F. (Project member), Gültekin, Y. C. (Project member) & Vacancy PHD (Project member)
1/01/22 → 31/08/28
Project: Third tier