• 4011 Citations
1991 …2019
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Personal profile

Research profile

Erik Jan Marinissen is Principal Scientist at the world-renowned research institute imec in Leuven, Belgium, where he is responsible for research on test and design-for-test, covering topics as diverse as TSV-based 3D-stacked ICs, silicon photonics, CMOS technology nodes below 10nm, and STT-MRAMs. In addition, he is Visiting Researcher at Eindhoven University of Technology, the Netherlands. Previously, he worked at NXP Semiconductors and Philips Research Laboratories in Eindhoven. Marinissen holds an MSc degree in Computing Science (1990) and a PDEng degree in Software Technology (1992), both from Eindhoven University of Technology. He is co-author/editor of one book, (co-)author of 270 journal and conference papers, and (co-) inventor on 18 granted US/EP patent families. Marinissen is recipient of the Most Significant Paper Awards at the IEEE International Test Conference (ITC) 2008 and 2010, Best Paper Awards at the Chrysler-Delco-Ford Automotive Electronics Reliability Workshop 1995, the IEEE International Board Test Workshop 2002, the International Wafer-Level Packaging Conference (IWLPC) 2018, and the IEEE Latin-American Test Symposium (LATS) 2019, the Most Inspirational Presentation Award at the IEEE Semiconductor Wafer Test Workshop 2013, the HiPEAC Tech Transfer Award 2015, the National Instruments’ Engineering Impact Award 2017, the IEEE Standards Association Emerging Technology Award 2017. He served as Editor-in-Chief of IEEE Std 1500 and as Founder and Chair (currently Vice-Chair) of the IEEE Std P1838 Working Group on 3D test access. Marinissen is founder of the workshops ‘Diagnostic Services in Network-on-Chips’ (DSNOC), DATE’s Friday 3D Integration, and the IEEE ‘International Workshop on Testing Three-Dimensional Integrated Circuits’ (3D-TEST). He has been Program Chair of DDECS 2002, ETS 2006, 3D-TEST 2009-15, and DATE 2013, and General Chair of ETW 2003, DSNOC 2007-08, 3DIW 2009-10, and serves on numerous conference committees, including ATS, DATE, ETS, ITC, ITC-Asia and VTS. He serves on the editorial boards of IEEE ‘Design & Test’ and Springer’s ‘Journal of Electronic Testing: Theory and Applications’. During the span of his career, Marinissen has supervised 43 international MSc and PhD students. He is a Fellow of IEEE (2011), Golden Core Member of CIEEE omputer Society (2005), and elected as member of the Computer Society's Board of Governors (2019-2021).

External positions

Lecturer, High Tech Institute

2016 → …

Principal Scientist, IMEC

1 Oct 2008 → …

Senior Principal Scientist, NXP Semiconductors

1 Aug 200630 Sep 2008

Principal Scientist, Philips Research

1 Mar 199231 Jul 2006

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Research Output 1991 2019

3D design‐for‐test architecture

Marinissen, E. J., Konijnenburg, M., Verbree, J., Chi, C-C., Deutsch, S., Papameletis, C., Burgherr, T., Shibin, K., Keller, B. L., Chickermane, V. & Goel, S. K., 8 Feb 2019, Handbook of 3D integration: volume 4: design, test, and thermal management. Franzon, P. D., Marinissen, E. J. & Bakir, M. S. (eds.). Weinheim: Wiley-VCH Verlag, p. 253-280 28 p.

Research output: Chapter in Book/Report/Conference proceedingChapterAcademicpeer-review

Hierarchical systems
Data compression
Towers
Data storage equipment
Networks (circuits)

3D test: no longer a bottleneck!

Marinissen, E. J., 8 Mar 2019, In : 3DInCites: The First Decade. 1, 1, p. 21-26 + 60 7 p.

Research output: Contribution to journalArticleProfessional

Open Access
File
Data storage equipment
Semiconductor materials
Networks (circuits)
Testing
Three dimensional integrated circuits

Cost modeling for 2.5D and 3D stacked ICs

Taouil, M., Hamdioui, S. & Marinissen, E. J., 8 Feb 2019, Handbook of 3D integration: volume 4: design, test, and thermal management. Franzon, P. D., Marinissen, E. J. & Bakir, M. S. (eds.). Weinheim: Wiley-VCH Verlag, p. 189-208 20 p.

Research output: Chapter in Book/Report/Conference proceedingChapterAcademicpeer-review

Cost modeling
Costs
Integrated circuits
Manufacturing
Logistics

Defect-location identification for cell-aware test

Gao, Z., Malagi, S., Marinissen, E. J., Swenton, J., Huisken, J. & Goossens, K., 11 Mar 2019, (Accepted/In press) Proceedings of the IEEE Latin-American Test Symposium (LATS) 2019. IEEE Press, 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Defects
Automatic test pattern generation
Set theory
Failure analysis
Transistors

Handbook of 3D integration: Volume 4: Design, test, and thermal management

Franzon, P. D. (ed.), Marinissen, E. J. (ed.) & Bakir, M. S. (ed.), 1 Mar 2019, Weinheim: Wiley-VCH Verlag. 470 p.

Research output: Book/ReportBook editingAcademic

Temperature control
Materials science
Cooling
Testing
Industry

Prizes

Best 3D Track Paper at International Wafer-Level Packaging Conference 2018

Arnita Podpod (Recipient), Dimitrios Velenis (Recipient), Alain Phommahaxay (Recipient), Pieter Bex (Recipient), Ferenc Fodor (Recipient), Erik Jan Marinissen (Recipient), Kenneth June Rebibis (Recipient), Andy Miller (Recipient), Gerald Beyer (Recipient) & Eric Beyne (Recipient), 18 Jan 2019

Recognition: OtherCareer, activity or publication related prizes (lifetime, best paper, poster etc.)Scientific

Product Packaging

Best Paper Award Chrysler-Delco-Ford Automotive Electronics Reliability Workshop 1995

Erik Jan Marinissen (Recipient), Oct 1995

Recognition: OtherCareer, activity or publication related prizes (lifetime, best paper, poster etc.)Scientific

Automobile electronic equipment

Best Paper Award IEEE International Board Test Workshop (BTW'02)

Erik Jan Marinissen (Recipient), Ben Bennetts (Recipient) & H.G.H. Vermeulen (Recipient), Oct 2002

Recognition: OtherCareer, activity or publication related prizes (lifetime, best paper, poster etc.)Scientific

File
Electric wiring

Best Paper Award IEEE Latin-American Test Symposium 2019

Zhan Gao (Recipient), Santosh Malagi (Recipient), Erik Jan Marinissen (Recipient), Joe Swenton (Recipient), Jos Huisken (Recipient) & Kees Goossens (Recipient), 13 Mar 2019

Recognition: OtherCareer, activity or publication related prizes (lifetime, best paper, poster etc.)Scientific

Best Paper Award International Wafer-Level Packaging Conference 2018

Arnita Podpod (Recipient), Dimitrios Velenis (Recipient), Alain Phommahaxay (Recipient), Pieter Bex (Recipient), Ferenc Fodor (Recipient), Erik Jan Marinissen (Recipient), Kenneth June Rebibis (Recipient), Andy Miller (Recipient), Gerald Beyer (Recipient) & Eric Beyne (Recipient), 18 Jan 2019

Recognition: OtherCareer, activity or publication related prizes (lifetime, best paper, poster etc.)Scientific

Product Packaging

Activities 2000 2019

  • 8 Workshop, seminar, course or exhibition
  • 3 Editorial activity
  • 2 Conference
  • 1 Membership of board

IEEE Computer Society Board of Governors (External organisation)

Erik Jan Marinissen (Member)
1 Jan 201931 Dec 2021

Activity: Membership typesMembership of boardProfessional

File

IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits

Erik Jan Marinissen (Chair)
8 Oct 20159 Oct 2015

Activity: Participating in or organising an event typesWorkshop, seminar, course or exhibitionScientific

IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits

Erik Jan Marinissen (Chair)
23 Oct 201424 Oct 2014

Activity: Participating in or organising an event typesWorkshop, seminar, course or exhibitionScientific

16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013)

Erik Jan Marinissen (Chair)
18 Mar 201322 Mar 2013

Activity: Participating in or organising an event typesConferenceScientific

IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits

Erik Jan Marinissen (Chair)
12 Sep 201313 Sep 2013

Activity: Participating in or organising an event typesWorkshop, seminar, course or exhibitionScientific

Press / Media

Best Paper Award at LATS2019 for Zhan Gao

Zhan Gao & Erik Jan Marinissen

3/04/19

1 item of media coverage

Press/Media: Research

Collecting Awards at SEMICON West

Erik Jan Marinissen

1/09/17

1 item of media coverage

Press/Media: Research

New Solution for Testing Chips Prior to 3D Stacking

Erik Jan Marinissen

21/08/17

1 media contribution

Press/Media: Research

Student theses

Automated test control block generation and minimization

Author: Marinissen, E., 14 Mar 1990

Supervisor: Rem, M. (Supervisor 1), Dekker, R. (External person) (Supervisor 2) & Beenker, F. (Supervisor 2)

Student thesis: Master

Automatic generation of in-circuit tests on Prodrive's AET system for board assembly defects

Author: van Schaaijk, H., 31 Aug 2017

Supervisor: Mesman, B. (Supervisor 1), Marinissen, E. (Supervisor 2), Alvarado, A. (Supervisor 2) & Spierings, M. G. (External coach)

Student thesis: Master

File

LaySiChain: the improved layout-sensitive scan chain inserter

Author: van den Heuvel, P., 30 Jun 1997

Supervisor: Segers, M. (Supervisor 1) & Marinissen, E. J. (External coach)

Student thesis: Master

File

Reducing IC test time through parallel composition of test protocols

Author: Moerenhout, M., 31 Aug 1996

Supervisor: Aarts, E. (Supervisor 1) & Marinissen, E. (Supervisor 2)

Student thesis: Master

SmartScan: full scan benefits for partial scan cost

Author: Verhaegh, J., 31 Oct 1994

Supervisor: Segers, M. (Supervisor 1), Merkus, P. (Supervisor 2) & Marinissen, E. J. (External coach)

Student thesis: Master

File