Content available in repository
Content available in repository
Personal profile
Quote
I am designing a Phase-Locked Loop (PLL) based frequency synthesizer for 60 GHz FMCW radar. The single-chip radars will be used to form a phased-array radar for imaging. My research focus is to synchronize the phases of the PLL output signals from different chips.
Education/Academic qualification
Electrical engineering, Master, Korea University
2009 → 2011
Computer systems, architectures, networks, Bachelor, Bangladesh University of Engineering and Technology
2002 → 2007
External positions
Analog Design Engineer, DOESTEK Co. Ltd.
2011 → 2015
Fingerprint
Dive into the research topics where Debashis Dhar is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Research output
- 3 Conference contribution
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Analysis of the effect of PFD sampling on charge-pump PLL stability
Dhar, D., van Zeijl, P. T. M., Milosevic, D., Gao, H. & Baltus, P. G. M., 26 Apr 2018, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, p. 1-5 5 p. 8351180Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
5 Citations (Scopus) -
Modeling and analysis of the effects of PLL phase noise on FMCW radar performance
Dhar, D., Zeijl, P. T. M., Milosevic, D., Gao, H. & van Roermund, A. H. M., 25 Sept 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 28-31 May 2017, Baltimore, Maryland: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 4 p. 8050525Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
41 Citations (Scopus)5 Downloads (Pure) -
Noise analysis of a BJT-based charge pump for low-noise PLL applications
Dhar, D., van Zeijl, P. T. M., Milosevic, D., Gao, H. & Baltus, P. G. M., 31 Oct 2017, 2017 European Conference on Circuit Theory and Design, ECCTD 2017. Piscataway: Institute of Electrical and Electronics Engineers, 4 p. 8093234Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
6 Citations (Scopus)