Projects per year
Organisation profile
Introduction / mission
In this research area we focus on a variety of frontends where low power consumption, energy efficiency, and form factor play energy efficiency play an important role. In particular we focus on biomedical applications. Both frontends for wireless communication and frontends for sensor interfacing are considered.
Organisation profile
In today’s world, small electronic devices are present everywhere. For instance, you can think of smart-phones, smart watches, environmental sensors, wearable patches for glucose monitoring, or implants for health monitoring and electrical stimulation. Many of these devices are portable, wearable, or implantable, or they are placed somewhere in the environment. For these reasons, such systems need to be small and light-weight while they preferably can operate for a long time without recharging.
In the Resource-Efficient Electronics lab, we focus on developing electronics with extremely low power consumption and small form-factor as needed for such applications. We do this mostly in the domain of medical applications and wireless communication, but also for general purpose electronics with the purpose of saving energy and material resources. Our core-strength is in mixed-signal and analog electronics, often combined with signal processing & algorithms, but we also have some limited activities involving RF and digital electronics. Some examples of our work can be found on our YouTube Channel.
To address the above challenges, we use various ways, such as:
- Circuit theory and design: we use basic theory and analysis to optimize circuit design at schematic and layout levels for better efficiency (i.e.: to achieve better performance at lower cost). For instance, this has resulted in an extremely efficient temperature sensor (3pJ per measurement, ISSCC 2023) and various generations of power/area-efficient capacitor implementations (90aF, CICC 2024).
- System design: beyond circuit-level design, usually much bigger improvements can be made at the system level, for instance by properly partitioning the system, by better understanding application needs and adapting the implementation towards that, by proposing novel architectures, and by studying the interaction between circuit blocks and co-optimizing them rather than developing each component independently. For instance, this has resulted in the lowest-power ECG recording front-end (3nW, ISSCC 2015).
- Smart algorithms and processing: augmenting circuits/systems with smart algorithms can often help with improving performance or reducing resources. Examples vary from simple offset calibration systems up to processing techniques that can reduce noise and distortion or expand the dynamic range beyond the supply. Besides developing these smart algorithms, a second challenge is how to implement such algorithms efficiently. Often we use mixed-signal approaches instead of fully-digital ones to maximize efficiency. For instance, we’ve implemented ADCs with efficient noise reduction algorithms (ISSCC 2014) and ADCs with efficient distortion (mismatch) compensation techniques (ESSCIRC 2021).
To better exemplify the activities in the Resource Efficient Electronics Lab, a couple of completed projects are summarized below:
- In the PASTEUR project, we developed several low-power SAR ADCs for RFID tags. Besides circuit optimization, we also introduced algorithms to improve noise performance.
- In the VENI project, we developed SAR ADCs that are reconfigurable in terms of resolution and sampling rate, such that they can cover multiple communication standards or multiple medical sensor applications. The purpose was to develop multifunctional electronics for mobile medical care.
- In the PHOENIX project, we expanded the reconfigurable ADCs into reconfigurable sensor interfaces, providing the opportunity to interface directly to resistive or capacitive sensors, such as temperature sensors, accelerometers and pH sensors. The proposed very low-power circuits are to be integrated in independent sensors nodes to explore unknown environments.
- In the EWAM project, a complete analog readout system was designed to enable ambulatory monitoring of pregnancies using capacitive sensor electrodes. The development includes the design of amplifiers, ADCs, and smart processing tricks to deal with motion artefacts and tribo-electricity.
- In the VIDI project, we investigated fundamental limits of area/power efficiency for various analog building blocks. Based on that knowhow, ADCs, amplifiers, filters, sensor interfaces, and digital communication interfaces were built that pushed the state-of-the-art towards better resource efficiency.
- In the PAVIS project, innovative electronics for vital signs monitoring in professional healthcare were developed. Our contribution was to develop a setup to measure vital signs inside an MRI system, and to analyze the performance and dependencies on the MRI parameters.
- In the LOCATE project, an ultrasound imaging chip was built that enables harmonic imaging while also being reconfigurable in performance. The purpose is to support a development platform for high-resolution ultrasound microvasculature imaging to develop novel cancer localization strategies.
- In the POSITION-II project, we worked towards the next generation of smart catheters. Our contribution was to develop a miniature 32-channel digitizer for an intracardiac echocardiography (ICE) catheter application.
The Resource Efficient Electronics Lab contributes to three courses in the Bachelor/Master curriculum, namely:
- 5XCC0 “Biopotential and Neural Interface Circuits” (3rd year Bachelor course or elective for Master students): in this course you will learn about biomedical sensing/stimulation applications and their related electronics. At electronic level, you will not only learn a lot about low-power design strategies for analog, mixed-signal and digital circuits, but you will also learn about system design approaches, layout techniques, and you will learn how to use Cadence design software.
- 5SFA0 “Data Converters 1: fundamentals” (Master students): in this course you will learn the basics of ADCs and DACs, covering a wide variety of architectures, while also learning the basics of the various signal domains and data converter specifications.
- 5SFD0 “Data Converters 2: design” (Master students): in this course, you will design various data converters in Cadence and/or Matlab. For the Resource Efficient Electronics Lab, you will learn step-wise how to design and optimize a low-power SAR ADC.
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Collaborations and top research areas from the last five years
Profiles
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Pieter J.A. Harpe
- Electrical Engineering, Center for Care & Cure Technology Eindhoven
- Electrical Engineering, Resource Efficient Electronics Lab
- Electrical Engineering, Integrated Circuits - Associate Professor
- Electrical Engineering, Center for Wireless Technology Eindhoven
Person: UHD : Associate Professor
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Karim A. Mahmoud
- Electrical Engineering, Integrated Circuits - Postgraduate Design Engineer
- Electrical Engineering, Resource Efficient Electronics Lab
Person: TOIO : EngPD-trainee
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Maarten J. Molendijk
- Electrical Engineering, Integrated Circuits - Doctoral Candidate
- Electrical Engineering, Resource Efficient Electronics Lab
Person: Prom. : doctoral candidate (PhD), Prom. : doctoral candidate (PhD)
Projects
- 5 Finished
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Analog circuits to the limit: minimum resources with maximum performance
Harpe, P. J. A. (Project Manager), Harpe, P. J. A. (Project member), Shen, Y. (Project member), Li, H. (Project member) & van der Hagen, D. (Project communication officer)
1/08/18 → 31/07/23
Project: Research direct
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A pilot line for the next generation of smart catheters and implants
Harpe, P. J. A. (Project Manager), van Dommele, A. R. (Project member), Pelzers, K. M. P. (Project member), Xin, H. (Project member) & van der Hagen, D. (Project communication officer)
1/06/18 → 30/09/21
Project: Research direct
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LOCATE (MsM) 15282
Harpe, P. J. A. (Project Manager), van Dommele, A. R. (Project member), van der Hagen, D. (Project communication officer) & Zhou, M. (Project member)
1/10/17 → 28/10/22
Project: Research direct
Research output
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A 1.8-65 fJ/conv.-step 64 dB SNDR Continuous - Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators
Timmermans, M. (Corresponding author), van Oosterhout, K., Fattori, M., Harpe, P. J. A., Liu, Y.-H. & Cantatore, E., Apr 2024, In: IEEE Journal of Solid-State Circuits. 59, 4, p. 1194-1203 10 p., 10433522.Research output: Contribution to journal › Article › Academic › peer-review
Open AccessFile3 Citations (Scopus)610 Downloads (Pure) -
A 0.0022 mm2 10 bit 20 MS/s SAR ADC with Passive Single-Ended-to-Differential-Converter
Pelzers, K., van der Struijk, M. & Harpe, P. (Corresponding author), 1 Jan 2023, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 70, 1, p. 29-39 11 p., 9882964.Research output: Contribution to journal › Article › Academic › peer-review
Open AccessFile2 Citations (Scopus)367 Downloads (Pure) -
A 0.0033 mm23.5 fJ/conversion-step SAR ADC with 2× Input Range Boosting
Shen, Y., Li, H., Cantatore, E. & Harpe, P., 21 Jul 2023, ISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings. Institute of Electrical and Electronics Engineers, 5 p. 10182072Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
Open AccessFile108 Downloads (Pure)
Activities
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IEEE Journal of Solid-State Circuits (Journal)
Genco, E. (Editorial board member), Garripoli, C. (Editorial board member), van der Steen, J.-L. (Editorial board member), Gelinck, G. H. (Editorial board member), Abdinia, S. (Editorial board member) & Harpe, P. J. A. (Editorial board member)
Nov 2023Activity: Publication peer-review and editorial work types › Publication peer-review › Scientific
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Ultra low power SAR ADCs, sensor interfaces, and temperature sensors
Harpe, P. J. A. (Speaker)
16 Jun 2023Activity: Talk or presentation types › Invited talk › Scientific
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Ultra low power SAR ADCs, sensor interfaces, and temperature sensors
Harpe, P. J. A. (Speaker)
8 May 2023Activity: Talk or presentation types › Invited talk › Scientific
File
Student theses
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A configurable, intermittently executing, low-power energy harvesting platform with dynamic hardware and software power management
van Bolderik, B. (Author), Jordans, R. (Supervisor 1), Sedighiani, S. (Supervisor 2) & Harpe, P. J. A. (Supervisor 2), 18 Feb 2022Student thesis: Master
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Clock Synchronization For Radio Interferometry
Langemeijer, E. H. C. (Author), Jordans, R. (Supervisor 1), Harpe, P. J. A. (Supervisor 2) & Koedam, M. L. P. J. (Supervisor 2), 29 Apr 2024Student thesis: Master
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Exploring power gating in coarse grained re-configurable architectures
Carboni Munoz, F. A. (Author), Huisken, J. A. (Supervisor 1), Goossens, K. G. W. (Supervisor 2), Harpe, P. J. A. (Supervisor 2) & Corporaal, H. (Supervisor 2), 6 Mar 2020Student thesis: Master
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