URL study guide
https://tue.osiris-student.nl/onderwijscatalogus/extern/cursus?cursuscode=2IMNT1&collegejaar=2025&taal=enDescription
This course aims at providing in-depth knowledge in a number of subjects in the field of computer architecture and computer organization. In particular, the relation between an algorithm and the possible archictectures that execute the algorithm will be investigated. We will discuss methods to transform a sequentially expressed algorithm via single assignment code and a dependency graph into a signal flow graph. From there on various hardware implementations will be developed in the form of array processors or systolic arrays. In case of an irregular dependency graph, the hardware will take the form of a simple Von Neumann architecture with a dedicated instruction set. Topics included are linear (static) scheduling, pipelining, re-timing and design transformations. A second aim of the course is to specify the resulting hardware alternatives in a formal way, by means of mathematical equations. Using the evaluation mechanisms of a functional programming language, these equations can be directly evaluated leading to a simulation of the hardware. Besides, these specifications open the possibility to prove that the functionality of the various hardware alternatives is the same.Objectives
To follow this course and/or be able to do an exam, you must also be registered at the University of Twente (UT).In order to have access to course material and to online lectures, TU/e students must send an email with their student information to [email protected] with a request to register to Embedded Computer Architectures 2.
Lectures for this course are taught at the University of Twente. Students can also follow the lectures by watching a live stream that will be broadcast via the internet. Recordings of the live streams will be made available. More information about the live stream and the recordings will be made available at the start of the course.
After completion of the course, the student can:
Define linear (static) scheduling, data dependent scheduling, pipelining, re-timing and design transformations in context of computer architecture and computer organisation.
Explain the relation between algorithms and their optimal architectures.
Transform algorithms expressed in a sequential language via single assignment code and a dependency graph into a signal flow graph (The latter suggesting the hardware implementation of the algorithm in the form of an array processor or a systolic array. Or, in case of an irregular dependency graph in the form of a simple von Neumann architecture with a dedicated instruction set).
being able to describe a signal flow graph by means of mathematical equations.
Translate a mathematical equation into a functional program and deduct a hardware structure from this.